COOL CMOS: Journey with Cryogenic-Aware Circuits Modeling, Challenges, and Opportunities (45' + 15')

• Hussam Amrouch (TUM)

**Abstract**: Cryogenic CMOS circuits are pivotal in numerous fields, particularly in designing controllers for quantum computers. However, cryogenic temperatures fundamentally alter the semiconductor physics of CMOS transistors, rendering traditional transistor compact models, SPICE simulations, and EDA tools inadequate. In this talk, we will introduce an innovative end-to-end solution that enables the design of cryogenic CMOS circuits. We will unveil the first-of-its-kind cryogenic-aware industrial-standard compact model for transistors, validated against commercial 5 nm FinFET technology from 300 K down to 10 K. This model empowers analog designers to proactively optimize circuits for cryogenic conditions. Furthermore, we will explore the creation of cryogenic-aware standard cell libraries, marking a significant advance in performing cryogenic-aware logic synthesis for digital designs. The discussion will extend to the impact of cryogenic temperatures on the behavior of SRAM memory arrays and the unique opportunities there. Lastly, we will highlight the critical reliability challenges for analog circuits at cryogenic temperatures, particularly focusing on transistor self-heating's adverse effects, especially in current FDSOI technologies. **Short bio**: Hussam Amrouch is a W3-Professor heading the Chair of AI Processor Design at the Technical University of Munich (TUM). He is, additionally, heading the Brain-inspired Computing at the Munich Institute of Robotics and Machine Intelligence (MIRMI). Further, he is the head of the Semiconductor Test and Reliability at the University of Stuttgart. He received his Ph.D. degree with the distinction (summa cum laude) from KIT in 2015. He has 260 publications (including over 110 articles in many top journals like Nature Communications) in multidisciplinary research areas covering semiconductor device physics, circuit design and computer architecture. His research interest is transistor compact modeling, cryogenic-aware circuit design for quantum computing, emerging technologies, in-memory computing, RISC-V design, reliability of advanced technology nodes like 5nm.